Integrated semiconductor circuit with polarity reversal protection

ABSTRACT

An integrated semiconductor circuit for use in a low voltage (1.5-2 V) battery operated device is provided with a protection circuit against reverse connection of the battery. 
     The protection circuit takes care that the substrate is always connected to one extreme potential and a region containing one or more resistors is always connected to the other extreme potential irrespective of the proper or reverse mode of connection of the battery. The protection circuit has been designed in such a way that no voltage drop occurs between the battery connections and the supply voltage connection terminals of the integrated semiconductor circuit.

The invention relates to a circuit comprising an integratedsemiconductor circuit and a protection circuit, which integratedsemiconductor circuit comprises a number of components provided on asubstrate, which components are each surrounded by a region of aparticular conductivity type, and which integrated semiconductor circuitis provided with at least two supply voltage connection terminals and aconnection terminal which is coupled to the region of a particularconductivity type.

Integrated semiconductor circuits whose components are manufactured, forexample, with the aid of an epitaxial procedure are generally known andare also used on a large scale because the epitaxial procedure issimple, satisfactorily reproducible and cheap.

If the components are epitaxial n-p-n transistors, the region of aparticular conductivity type which surrounds an n-p-n transistor is ap-type substrate. An integrated circuit of this type contains aparasitic p-n-p transistor formed by the p-type base, the n-typecollector and the p-type substrate. This transistor should always bekept in the off-state in order to be able to guarantee the normaloperation of the circuit and because such high currents are otherwiseable to flow that one or more p-n junctions break down, which generallymeans that the integrated circuit has become unusable. For this purpose,it is known to connect the substrate to the most negative voltage in thecircuit.

A problem arises, however, if the supply voltage of the integratedcircuit is accidentally incorrectly connected, i.e. the positiveterminal of the circuit is connected to the negative terminal of thesupply source and the negative terminal of the circuit to the positiveterminal of the supply source. The substrate is then suddenly connectedto the most positive voltage in the circuit and the parasitic p-n-ptransistor may be turned on completely, which will result in such highcurrents that the circuit becomes unserviceable.

Diverse solutions have already been proposed for this problem. Thus, itis possible to include in the integrated circuit a bridge circuitcomprising four diodes between the external supply voltage terminals andthe internal supply voltage terminals for the circuit, which makes itpossible to guarantee at all times a correct polarity for the circuitand therefore also for the substrate regardless of the polarity of thesupply voltage connected, with the result that the circuit will functionin the correct manner at all times. It is also possible to include,between an external and an internal supply voltage terminals, a singlediode which only conducts if the supply voltage is connected in thecorrect manner, with the result that although the circuit does notfunction if a supply voltage having an incorrect polarity is connected,it is also unable to become unserviceable.

A drawback of each of these solutions is that a voltage drop ofapproximately 0.6 V always occurs over a diode in the conducting state.If, therefore, the external supply voltage is relatively low, forexample a battery supply of 1.5 to 2 V, said voltage drop is so largethat the actual supply voltage for the circuit, 0.9 to 1.4 V, is too lowto make satisfactory functioning possible. In particular, thisrelatively high voltage drop is disadvantageous if a circuit which issupplied is a high-voltage supply circuit in which use is made of, forexample, a diode ladder for the voltage multiplication. The practicallyachievable high voltage will then be lower by the same amount withrespect to the maximum possible high voltage than the actual supplyvoltage with respect to the supply voltage delivered by the supplysource, such as a battery.

The object of the invention is to offer a solution for this problem as aresult of which, even with relatively low external supply voltages, anincorrect polarity of the supply voltage source connected to anintegrated circuit cannot result in said circuit becoming unserviceable,without the value of the external supply voltage and the value of thesupply voltage actually available for the circuit within the integratedcircuit substantially differing from each other if the polarity iscorrect.

For this purpose the invention provides a circuit of the abovementionedtype which is characterized in that the protection circuit comprises twoinput terminals and an output terminal, in that a first input terminalis coupled to a first supply voltage connection terminal, in that thesecond input terminal is coupled to a second supply voltage connectionterminals, in that the output terminal of the protection circuit iscoupled via the connection terminal to the region of a particularconductivity type, and in that the protection circuit provides aconduction path between the output terminal and the input terminalhaving the most extreme potential, which most extreme potential is themost positive potential in the event that the region has an n-typeconductivity and the most negative potential in the event that theregion has a p-type conductivity.

According to a preferred embodiment of the invention the protectioncircuit comprises two transistors and two resistors, the base electrodeof the first transistor being coupled via a resistor to the first inputterminal, the emitter electrode to the second input terminal and thecollector electrode to the output terminal and the base electrode of thesecond transistor being coupled via the other resistor to the secondinput terminal, the emitter electrode to the first input terminal andthe collector electrode to the output terminal.

If the substrate is a p-type substrate, which is most usual in the caseof epitaxially constructed transistors, the transistors of the circuitaccording to the invention are of the n-p-n type and the output terminalof the circuit is coupled to the substrate.

According to the invention, these measures ensure, as will be explainedin more detail below, that the substrate is at all times at a supplypotential such that the parasitic transistors cannot be turned on.

Preferably the protection circuit of the circuit according to theinvention is included in the same substrate as the integratedsemiconductor circuit, so that the transistors and resistors aresubjected to the same temperature effects and the like as the othercomponents of the circuit and will function adequately at all times.

The principle on which the invention is based can also be advantageouslyused if the integrated semiconductor circuit comprises one or moreresistors as components. Resistors of this type are formed in theepitaxial procedure at the same time as the base diffusion by providingin the n-type epitaxial layer p-type regions, each of which regions isable to function as a resistor in a manner known per se. In this case,however, it is necessary to keep the n-type epitaxial layer whichsurrounds the resistor or resistors at the most positive potential ofthe circuit in order to keep the p-n junction reverse-biased at alltimes. This is because, in the case of resistors, p-n-p transistors arealso present, either between two resistors or between a resistor, theepitaxial region and the p-type substrate.

Parasitic p-n-p transistors of this type can be turned on if thepotential of a resistor becomes higher than that of the n-type regionand may result in such high short-circuit currents that one or more p-njunctions in the circuit break down, as a result of which the circuitbecomes unserviceable.

This problem, too, can also be eliminated in the known manner with theaid of a bridge circuit of diodes or with the aid of a single diode,but, with relatively low external supply voltages, these known solutionsagain have the drawback that, as a consequence of the voltage drop overa diode which has been turned on, the supply voltage actually availablefor the circuit becomes too low. The object of the invention is also tooffer a solution for this problem in the event that use is made ofrelatively low supply voltages.

In an integrated semiconductor circuit in which the components comprisep-type resistors formed in an n-type conductivity region by diffusion,the transistors of the protection circuit are of the p-n-p type.

As will also be explained below, these measures ensure that theepitaxial region which surrounds the p-type resistor regions are at alltimes at a supply voltage such that the parasitic transistors presentcannot be turned on.

The invention will be explained in more detail below on the basis of twoexemplary embodiments with reference to the drawing. In the latter:

FIG. 1 shows a diagrammatic cross-section of an n-p-n transistor formedaccording to the epitaxial procedure;

FIG. 2 shows the diagram of a circuit according to the invention forensuring the correct potential for the substrate on which the transistoraccording to FIG. 1 is formed;

FIG. 3 shows a diagrammatic cross-section of two resistors formed in ann-type epitaxial region; and

FIG. 4 shows the diagram of a circuit according to the invention forensuring the correct polarity for the epitaxial region in which theresistors according to FIG. 3 are formed.

FIG. 1 shows an n-p-n transistor which has been formed in a manner knownper se according to an epitaxial procedure on a p-type substrate 1 andwhich comprises an n-type collector region 2 which is formed from asection of an n-type epitaxial layer, a p-type base region 3 which isformed by a p-type diffusion in the collector region 2, and an n-typeemitter region 4 which is formed by an n-type diffusion in the baseregion 3. Each of the regions 2, 3 and 4 is provided with respectiveconnection terminals which are indicated by c, b and e. In addition, aconnection terminal 5 is provided for the substrate.

As is event from FIG. 1, a parasitic p-n-p transistor is formed by thep-type substrate 1, the n-type collector region 2 and the p-type baseregion 3. To prevent said parasitic transistor being turned on, it isnecessary for the substrate 1 to be connected at all times to the mostnegative potential which is present in the integrated circuit of whichthe transistor shown forms part. For this purpose, the connectionterminal 5 for the substrate is usually interconnected internally in theintegrated circuit with the supply voltage connection terminal for themost negative supply voltage of an external supply voltage source. Ifthe polarity of the external supply voltage source is inadvertentlyreversed, as a result of which the supply voltage connection terminal ofthe integrated circuit for the most negative supply voltage is connectedto a higher or the highest supply voltage, the parasitic p-n-ptransistor may, however, in fact be turned on and in particular, if thevoltage connected to said connection terminal is the highest supplyvoltage, uncontrolled high currents may be able to flow which cause oneor more of the p-n junctions to break down.

According to the invention, a solution is found for this problem whichensures at all times that the substrate is connected to the mostnegative potential, without a voltage drop occurring under thesecircumstances which causes the supply voltage available for theintegrated circuit to be lower than the supply voltage delivered by theexternal voltage source.

FIG. 2 shows the circuit according to the invention included between asupply voltage source 26 having a negative connection terminal 25 and apositive connection terminal 24, and a diagrammatically shown integratedcircuit 20 having a connection terminal 21 for the positive supplyvoltage and a connection terminal 22 for the negative supply voltage,which integrated circuit is also provided with a connection terminal 23for the substrate, which terminal is therefore interconnected internallyin the integrated circuit with connection terminal 5.

The polarity reversal protection circuit according to the invention hastwo input terminals 31 and 32 and an output terminal 33 which is coupledto the connection terminal 23 for the substrate.

The circuit comprises two n-p-n transistors 27 and 28 and two resistors29 and 30. The resistor 29 is coupled between the input terminal 31 andthe base of the transistor 27 and the resistor 30 is coupled between theinput terminal 32 and the base of the transistor 28. The emitter of thetransistors 27 and 28 are respectively connected to the input terminals32 and 31 and the collectors of the transistors 27 and 28 are coupled toeach other and to the output terminal 33.

The polarity reversal protection circuit operates as follows. If thesupply voltage source 26 is connected in the correct manner as shown incontinuous lines in FIG. 2, i.e. with the positive connection terminal24 connected to the connection terminal 21 of the integrated circuit 20and with the negative connection terminal 25 connected to the connectionterminal 22 of the integrated circuit, input terminal 31 is alsoconnected to the positive supply voltage and the input terminal 32 tothe negative supply voltage. Consequently, n-p-n transistor 27 will becompletely turned on and n-p-n transistor 28 will be in the off-state.Because transistor 27 is completely turned on, a conduction path isproduced between input terminal 32 and output terminal 33, as a resultof which the negative supply voltage for the substrate is available atoutput terminal 33. The fact that no voltage drop occurs over thecompletely turned on transistor 27 ensures that the substrate voltage isequal to the most negative potential available. In addition, no voltageloss occurs between the terminals 24 and 21 on one hand and theterminals 25 and 22 on the other hand, with the result that the fullvoltage of supply voltage source 26 is available over the integratedcircuit, which is of great importance, especially in the case of lowsupply voltages.

If the supply voltage source 26 is inadvertently incorrectly connected,i.e. with the negative connection terminal 25 connected to theconnection terminal 21 of the integrated circuit 20 and with thepositive connection terminal 24 connected to the connection terminal 22,the integrated circuit will not be able to function, but owing to theprotection circuit according to the invention, will also be unable tobecome unserviceable. This is because if a supply voltage is incorrectlyconnected in this manner, transistor 27 will be reverse-biased andtransistor 28 will then be completely turned on. Consequently, aconducting path is now produced between output terminal 32 and the inputterminal 31, as a result of which the substrate is again connected tothe most negative potential available, with the result that parasiticp-n-p transistors in the integrated circuit cannot be turned on.

FIG. 3 shows diagrammatically the manner, known per se, in which ap-type resistor region 8 having connection terminals 9 and 9' and ap-type resistor region 10 having connection terminals 11 and 11' areformed on the p-type substrate having an epitaxial region 6 of then-type thereon. The epitaxial region 6 which is provided with aconnection terminal 7, forms part of the same epitaxial layer as thatfrom which the collector region 2 of the transistor according to FIG. 1is formed. In other respects, identical components in FIGS. 1 and 3 areindicated by identical reference numerals. In the configuration shown inFIG. 3, parasitic p-n-p transistors are present which comprise twop-type resistors 8 and 10 and the intervening epitaxial n-type region 6and also one of the p-type resistor regions, the n-type epitaxial region6 and the p-type substrate 1. To prevent one of said parasitictransistors being turned on, again with all the disastrous consequencesdescribed above, it is usual to connect the n-type epitaxial region 6internally in the integrated circuit to the connection terminal for themost positive potential, which in principle ensures that a p-n junctionof which the n-type epitaxial region 6 forms part can never be turnedon.

If, however, the external supply voltage source is inadvertentlyincorrectly connected, the n-type region 6 is connected to a lower oreven to the most negative potential, as a result of which one or more ofthe parasitic p-n-p transistors can in fact be turned on and such highcurrents are able to flow that one or more p-n junctions break down. Theidea explained on the basis of FIG. 2 and underlying the invention canalso offer a solution in this case. The polarity reversal protectioncircuit according to the invention needed for this purpose is shown inFIG. 4, in which figure all the corresponding components have the samereference numerals as in FIG. 2 but increased by 20. The circuitaccording to FIG. 4 is in fact completely identical to that according toFIG. 2, with the exception of connection terminal 43 which is connectedto the epitaxial region 6 in the integrated circuit 40, that is to say,to the connection terminal 7 according to FIG. 3, and the transistors 47and 48, which are now of the p-n-p type.

If the supply voltage source 46 is correctly connected as shown in thefigure in a continuous line, p-n-p transistor 48 is fully turned on andtransistor 47 is reverse-biased, with the result that the outputterminal 53, and therefore the n-type epitaxial region 6, are coupled tothe highest potential. If the supply voltage source 46 has beenincorrectly connected as shown in a dotted line, the integrated circuit40 does not function but it does not become unserviceable either. Thereason is that transistor 47 now conducts and transistor 48 isreverse-biased, with the result that the output terminal 53, andtherefore the n-type epitaxial region, remain connected to the mostpositive potential and the parasitic p-n-p transistors cannot be turnedon.

The protection circuit according to FIG. 4 obviously has the sameadvantages as that according to FIG. 2, in particular that no lossoccurs in the supply voltage available for the integrated circuit.

Although the protection circuits shown in FIGS. 2 and 4 may be placedoutside the integrated circuit, it will be clear that they arepreferably included in the integrated circuit itself. As a result ofthis, possible errors in connecting the protection circuit such asinterchanging the input and output terminals are avoided, and thecomponents of the circuit are subject to precisely the sameenvironmental effects and ageing phenomena as the components of theintegrated circuit itself, which ensures an optimum reliablefunctioning.

It is obviously possible to include one of the two circuits according toFIG. 2 or FIG. 4 in an integrated circuit, but if the integrated circuitcontains transistors of the type shown in FIG. 1 and resistors of thetype shown in FIG. 3, both circuits are preferably provided, one for thesubstrate and one for the epitaxial region in which resistors have beenformed. If, however, resistors are used which have not been manufacturedaccording to an epitaxial procedure and which are completely insulatedfrom the rest of the circuit, as, for example, Ni-Cr resistors formed onthe SiO₂ top layer of an integrated circuit, it is possible to make dowith the circuit according to FIG. 2.

It is pointed out that in the event of an n-type substrate and a p-typeepitaxial layer being used, the circuit according to FIG. 2 is suitablefor protecting a p-type epitaxial region in which n-type resistors havebeen formed against polarity reversal and the circuit according to FIG.4 for protecting an n-type substrate on which p-n-p transistors havebeen formed.

Finally it is furthermore pointed out that the external supply voltagein the case of the circuits according to FIGS. 2 and 4 must not behigher than the base-emitter zener voltage of the transistors 27, 28 or47, 48 respectively. This should certainly not, however, be a problem inthe case of lower external supply voltages.

It will furthermore be clear that there are equivalents of theprotection circuits according to FIGS. 2 and 4, for example circuits inwhich thyristors are used instead of transistors, which circuitsfunction in the same manner as the circuits shown and are therefore alsoconsidered to fall within the invention as described in the claims.

I claim:
 1. A circuit, which comprises:a supply voltage source havingnegative and positive connection terminals; an integrated semiconductorcircuit including a number of components surrounded by a region ofparticular conductivity provided on a substrate, positive and negativeconnection terminals and a connection terminal to said region ofparticular conductivity, said positive and negative connection terminalsof said integrated semiconductor circuit connected to said positive andnegative connection terminals of said supply voltage source; and aprotection circuit having two input terminals and an output terminal,said input terminals connected to said negative and positive connectionterminals of said supply voltage source and of said integratedsemiconductor circuit, said output terminal connected to said connectionterminal of said semiconductor circuit, said protection circuitproviding a conduction path between said output terminal and said inputterminal having a most extreme potential, said most extreme potentialbeing a most positive potential when said region is of n-typeconductivity and a most negative potential when said region is of p-typeconductivity.
 2. The circuit as defined in claim 1 wherein said circuitmeans of said protection circuit includes first and second transistorsand first and second resistors, a base electrode of said firsttransistor coupled via said first resistor to a first input terminal, anemitter electrode of said first transistor coupled to a second inputterminal, a collector of said transistor coupled to said outputterminal, a base electrode of said second transistor coupled via saidsecond resistor to said second input terminal, a base electrode of saidsecond transistor coupled to said first input terminal and a collectorof said second transistor coupled to said output terminal.
 3. Thecircuit as defined in claim 2 wherein said components of said integratedsemiconductor circuit comprise n-p-n transistors wherein said region ofparticular conductivity is said substrate and is of a p-typeconductivity and wherein said transistors are of an n-p-n type.
 4. Thecircuit as defined in claim 2 wherein said components of said integratedsemiconductor circuit comprise p-type resistors surrounded by a regionof n-type conductivity and wherein said transistors are of an p-n-ptype.
 5. The circuit as defined in claims 1, 2, 3 or 4 wherein saidprotection circuit is formed on said substrate of said integratedsemiconductor circuit.